I2C, the Inter-Integrated Circuit bus, solves a basic problem of board-level design: how to let many chips share information without running a separate bundle of wires between every pair of them. The NXP I2C-bus specification and user manual (document UM10204) describes a simple bidirectional two-wire bus where only two lines are required, a serial data line (SDA) and a serial clock line (SCL). Every device on the bus connects to those same two wires, which keeps wiring count low even as the number of chips grows.
The bus was developed by Philips Semiconductors, the company that later became NXP, in 1982. Its original purpose was to provide cheap, short-distance communication between the chips inside consumer products such as televisions, where a microcontroller needed to configure tuners, audio processors, and display controllers. The two-wire scheme meant those chips could be linked across a circuit board with minimal pins and minimal cost, and that economy is why the bus spread so widely.
Communication on I2C is organized around addresses and a controller/target relationship (historically called master/slave). According to UM10204, each device has a unique address and can act as a transmitter or a receiver, while the controller is the device that generates the clock and initiates and terminates transfers. A transaction begins with a START condition, after which the controller sends the address of the device it wants and a bit indicating read or write; the addressed target acknowledges, and data then flows eight bits at a time, each byte followed by an acknowledge bit, until the controller issues a STOP condition. Standard addresses are seven bits wide, with a ten-bit extension defined for larger address spaces.
Because SDA and SCL are open-drain lines pulled high by resistors, any device can hold a line low, which the specification uses for two elegant features: clock stretching, where a slow target slows the clock by holding SCL down until it is ready, and arbitration, where multiple devices that try to control the bus at once resolve the conflict bit by bit without losing data. The specification has grown over time to define faster modes beyond the original Standard-mode at 100 kbit/s, including Fast-mode at 400 kbit/s, Fast-mode Plus at 1 Mbit/s, and High-speed mode at 3.4 Mbit/s.
I2C endured because it hits a sweet spot. It is slower than SPI but needs only two wires regardless of how many devices share them, and its addressing lets a processor reach dozens of parts over a single pair of pins. Real-time clocks, temperature and pressure sensors, small OLED displays, EEPROMs, and port expanders are routinely I2C devices, and the bus is exposed on the headers of boards like the Raspberry Pi, making it one of the most common ways embedded software reaches a peripheral chip.