The ARM Cortex-M

The ARM Cortex-M is a family of 32-bit processor cores designed specifically for microcontrollers and deeply embedded systems. ARM introduced the line in the mid-2000s, with the Cortex-M3 as the first widely adopted member, to bring 32-bit processing into the low-cost, low-power niche long held by 8-bit and 16-bit parts. Rather than sell finished chips, ARM licenses these cores to many silicon vendors, who wrap them in their own memory and peripherals, which is a large part of why Cortex-M became so pervasive.

ARM’s Cortex-M3 Technical Reference Manual describes the core directly. It implements the ARMv7-M Thumb instruction set, a compact 32-bit architecture whose instructions are encoded efficiently to keep program memory small, a real concern in microcontrollers where Flash is limited. The manual also documents the close coupling between the processor and its interrupt controller, which is essential to how the core handles the constant stream of real-world events an embedded system must service.

That interrupt controller is the Nested Vectored Interrupt Controller, or NVIC. The technical reference manual explains that the NVIC is tightly coupled to the processor core to give low-latency exception handling, supports a configurable number of external interrupts, and allows interrupts to be prioritized and nested so that a more urgent event can preempt a less urgent one already being handled. This deterministic, hardware-managed interrupt model is one of the main reasons Cortex-M is well suited to real-time control.

Over time ARM expanded the family across a range of performance and power points, from the very small Cortex-M0 aimed at the cheapest parts up through higher-performing members with floating-point and digital-signal-processing features. Because so many vendors build Cortex-M microcontrollers and system-on-chip parts around the same cores and the same programming model, the family became the default 32-bit choice for embedded work, displacing many proprietary architectures and underpinning a vast share of modern firmware.